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    • わかるVerilog HDL入門 文法の基礎から論理回路設計、論理合成、実装まで トランジスタ技術SPECIALNo.95/木村真也【著】

    • Auction ends01/16/2025 07:40 AM (Tokyo)
    • Current Time01/09/2025 07:40 AM (Tokyo)
    • Bids0
    • Availability 1 pcs
    • Leading Bidder
    • VAT Tax: 10 %
    • Return Policy: Not possible
    • Item condition: USED20
    • Shipping in Japan: Not Free
    • Auction ID: c1157283548
    • Automatic Extensionfalse
    • Item location: 神奈川県
    • Seller items: bookoff2022_1st All seller's items
    • Seller's Rating: 133396

    • Current Price

      ¥990 (~$6)

      (¥1,089 including tax)

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    • Buyout Price

      ¥990 (~$6)

      (¥1,089 including tax)

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    • Time left

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