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    • [A01171412]ディジタル論理回路・機能入門―Verilog HDL SILOSによるシステム・回路の検証

    • Auction ends01/15/2025 07:40 AM (Tokyo)
    • Current Time01/08/2025 15:26 PM (Tokyo)
    • Bids0
    • Availability 1 pcs
    • Leading Bidder
    • VAT Tax: 10 %
    • Return Policy: Not possible
    • Item condition: USED60
    • Shipping in Japan: Not Free
    • Auction ID: c1114375992
    • Automatic Extensionfalse
    • Item location: 大阪府
    • Seller items: books_dream All seller's items
    • Seller's Rating: 33329

    • Current Price

      ¥1,752 (~$11)

      (¥1,927 including tax)

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    • Buyout Price

      ¥1,752 (~$11)

      (¥1,927 including tax)

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